3.12.1986
6202667
55508978
behrad.niazmand@ttu.ee
Research Interests:
• System-on-Chip /Network-on-Chip Design
o Addressing Thermal issues using Adaptive Routing Algorithms
o Working on new Selection Functions
o Distributing Traffic and Temperature using minimal/non-minimal Routing Algorithms
o Extending current Selection Function proposals to Networks with higher dimensions (3D)
o Reconfigurable and Fault-Tolerant Architectures
o Introduction of checkers for Fault Detection in control part of NoC routers
• Computer Architecture
o Studying the Architecture of Multi-Core Processors
• Hardware Modeling and Design
• Computer Networks
• Real-Time Embedded Systems
o Mixed-Criticality Systems

Teenistuskäik

Töökohad ja ametid
01.09.2018–...   
Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutisüsteemide instituut, Teadur (1,00)
01.09.2018–24.12.2018   
Delft University of Technology (TU Delft), Visiting researcher (PostDoc) (1,00)
01.01.2017–31.08.2018   
Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutisüsteemide instituut, Nooremteadur (0,75)
06.10.2014–31.12.2016   
Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut, Arvutisüsteemide projekteerimise õppetool , Nooremteadur (0,75)
 
 
Haridustee
01.09.2014–16.05.2018   
Töökindluse parandamine kiipvõrkudel põhinevates süsteemides
2010–2012   
M.Sc. in Computer Engineering- Computer Architecture, Science and Research Branch, Islamid Azad University (IAU), Tehran, Iran
2005–2009   
B.Sc. in Computer Hardware Engineering, South Tehran Branch, Islamid Azad University (IAU), Tehran, Iran

Kvalifikatsioon

 
 
Teaduspreemiad ja tunnustused
2018, Behrad Niazmand, Accepted as one of the 5 candidates for the semi-final McCluskey PhD thesis award at ETS 2018
2016, Behrad Niazmand, Third Co-supervisor for Master Thesis of Apneet Kaur Sandhu, "Online fault detection methodology for control and data path of IP cores, A case study on Bonfire network-on-chip"
2016, Behrad Niazmand, Second Co-supervisor for Master Thesis of Martin Dída, "Performance Analysis of Bonfire Network on Chip"
2016, Behrad Niazmand, Second Co-supervisor for Master Thesis of Tsotne Putkaradze, "Turn Preserving Fault Tolerance Methodology for On-Chip Routers and Implementation on Bonfire Router"
2016, Behrad Niazmand, Assistance for labs for course "Digital Systems Modeling and Synthesis", code IAY0340, instructor : Professor Peeter Ellervee, Spring Semester.
2015, Behrad Niazmand, • Acquired IT Academy Scholarship (sponsored by Skype) for the second year of PhD studies at Tallinn University of Technology.
2014, Behrad Niazmand, • Acquired Tiger University Scholarship from HITSA for the first year of PhD studies at Tallinn University of Technology.
2010, Behrad Niazmand, • Accepted straightly in Master’s Degree at Islamic Azad University (IAU) – Science and Research Campus without passing the national general university entrance exam(Concours Nationale)
2009, Behrad Niazmand, • Acquired a collaborative invention certificate for "Implementing Ethernet Encryption and Decryption Board based on Microcontrollers", Iran
2009, Behrad Niazmand, • Ranked 1st for three semesters among the Computer engineering Department's Hardware students , IAU, South Tehran branch, Iran
 
 
Teadustöö põhisuunad
VALDKOND: 4. Loodusteadused ja tehnika; 4.8. Elektrotehnika ja elektroonika; CERCS ERIALA: T171 Mikroelektroonika ; PÕHISUUND: Info- ja kommunikatsioonitehnoloogia (arvuti- ja süsteemitehnika), • System-on-Chip /Network-on-Chip Design o Addressing Thermal issues using Adaptive Routing Algorithms o Working on new Selection Functions o Distributing Traffic and Temperature using minimal/non-minimal Routing Algorithms o Extending current Selection Function proposals to Networks with higher dimensions (3D) o Reconfigurable and Fault-Tolerant Architectures o Introduction of checkers for Fault Detection in control part of NoC routers • Computer Architecture o Studying the Architecture of Multi-Core Processors • Hardware Modeling and Design • Computer Networks • Real-Time Embedded Systems o Mixed-Criticality Systems
 
 
Lisainfo
• Acceptance of the paper titled “Logic-Based Implementation of Fault-Tolerant Routing in 3D Network-on-Chips” in NOCS 2016, Nara, Japan
• Acceptance of the paper titled “SoCDep2: A framework for dependable task deployment on many-core systems under mixed-criticality constraints” in ReCoSoC 2016, Tallinn, Estonia.
• Acceptance of the paper titled “A Framework for Comprehensive Automated Evaluation of Concurrent Online Checkers” to Euromicro DSD conference held in Madeira, Portugal, as a co-author.
• Acceptance of the paper titled “Automated Minimization of Concurrent Online Checkers for Networks-on-Chip” 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2015) held in Bremen, Germany as a co-author.
• Acceptance of the paper “A framework for combining concurrent checking and on-line embedded test for low-latency fault detection in NoC routers” in 9th IEEE/ACM International Symposium on Networks-on-Chip (NOCS 2015) held in Vancouver, Canada, as a co-author.
• Acceptance of the paper “Mixed-Criticality MPSoC Partitioning based on the NoCDepend Dependability Technique” in 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2015) held in Bremen, Germany, as a co-author.
• “Extended Checkers for Control Part of Routers in Network-on-Chips”, MEDIAN 2015, Manufacturable and Dependable Multicore Architectures at Nanoscale, DATE Friday Workshop, March 13, 2015, Grenoble, France
• “Extended Checkers for Control Part of Routers in Network-on-Chips”, Info- ja kommunikatsioonitehnoloogia doktorikool (IKTDK) 2014 conference for Doctoral Students in ICT, December 5-6, Rakvere, Estonia.
• "Extended Checkers for Logic-Based Distributed Routing in Network-on-Chips”, 14th Biennial Baltic Electronics Conference (BEC), October 6-8, 2014, Laulasmaa, Estonia.
• Seminar in department of Computer Engineering at Tallinn University of Technology, for practicing for BEC conference
• "Initialization and Installation of DHCP Service in windows Server 2003" Delivered as a term paper for the Computer Networks Lab. at Computer Engineering Department of IAU, 2009.
• "N-way Set-Associative Cache", Delivered as a term paper for Computer architecture Course, Under the supervision of
Dr. A. Broumandnia, at Computer Engineering Department of IAU, 2008.
• "Error Detection and Correction" Delivered as a term paper for Signals and Systems course, Under the supervision of
Dr. A. Broumandnia, at Computer Engineering Department of IAU, 2008.
• “Clock with AVR Microcontroller" Delivered as a course project for Microprocessor II course, under the supervision of
Dr. M. Kazemi Parsa, at Computer Engineering Department of IAU, 2009.

Publikatsioonid

Klass
Aasta
Publikatsioon
 
3.5.
2019
2.3.
2018
3.1.
2018
3.1.
2018
3.1.
2018
3.1.
2018
3.1.
2018
3.1.
2018
3.1.
2018
3.1.
2018
3.1.
2017
3.1.
2017
3.1.
2017
3.1.
2017
3.4.
2017
3.1.
2016
3.1.
2016
3.4.
2016
3.1.
2015
3.1.
2015
3.1.
2015
3.1.
2015
3.2.
2015
3.4.
2015
3.1.
2014
3.1.
2014
3.1.
2012
26.04.2019
3.12.1986
6202667
55508978
behrad.niazmand@ttu.ee
Research Interests:
• System-on-Chip /Network-on-Chip Design
o Addressing Thermal issues using Adaptive Routing Algorithms
o Working on new Selection Functions
o Distributing Traffic and Temperature using minimal/non-minimal Routing Algorithms
o Extending current Selection Function proposals to Networks with higher dimensions (3D)
o Reconfigurable and Fault-Tolerant Architectures
o Introduction of checkers for Fault Detection in control part of NoC routers
• Computer Architecture
o Studying the Architecture of Multi-Core Processors
• Hardware Modeling and Design
• Computer Networks
• Real-Time Embedded Systems
o Mixed-Criticality Systems

Career

Institution(s) and position(s)
01.09.2018–...   
Tallinn University of Technology , School of Information Technologies, Department of Computer Systems, Researcher (1,00)
01.09.2018–24.12.2018   
Delft University of Technology (TU Delft), Visiting researcher (PostDoc) (1,00)
01.01.2017–31.08.2018   
Tallinn University of Technology , School of Information Technologies, Department of Computer Systems, Junior Researcher (0,75)
06.10.2014–31.12.2016   
Tallinn University of Technology , School of Information Technologies, Department of Computer Engineering , Chair of Computer Systems Design, Junior Researcher (0,75)
 
 
Education
01.09.2014–16.05.2018   
PhD studies - Dependability Improvements of NoC-based Systems
2010–2012   
M.Sc. in Computer Engineering- Computer Architecture, Science and Research Branch, Islamid Azad University (IAU), Tehran, Iran
2005–2009   
B.Sc. in Computer Hardware Engineering, South Tehran Branch, Islamid Azad University (IAU), Tehran, Iran

Qualifications

 
 
Honours & awards
2018, Behrad Niazmand, Accepted as one of the 5 candidates for the semi-final McCluskey PhD thesis award at ETS 2018
2016, Behrad Niazmand, Third Co-supervisor for Master Thesis of Apneet Kaur Sandhu, "Online fault detection methodology for control and data path of IP cores, A case study on Bonfire network-on-chip"
2016, Behrad Niazmand, Second Co-supervisor for Master Thesis of Martin Dída, "Performance Analysis of Bonfire Network on Chip"
2016, Behrad Niazmand, Second Co-supervisor for Master Thesis of Tsotne Putkaradze, "Turn Preserving Fault Tolerance Methodology for On-Chip Routers and Implementation on Bonfire Router"
2016, Behrad Niazmand, Assistance for labs for course "Digital Systems Modeling and Synthesis", code IAY0340, instructor : Professor Peeter Ellervee, Spring Semester.
2015, Behrad Niazmand, • Acquired IT Academy Scholarship (sponsored by Skype) for the second year of PhD studies at Tallinn University of Technology.
2014, Behrad Niazmand, • Acquired Tiger University Scholarship from HITSA for the first year of PhD studies at Tallinn University of Technology.
2010, Behrad Niazmand, • Accepted straightly in Master’s Degree at Islamic Azad University (IAU) – Science and Research Campus without passing the national general university entrance exam(Concours Nationale)
2009, Behrad Niazmand, • Acquired a collaborative invention certificate for "Implementing Ethernet Encryption and Decryption Board based on Microcontrollers", Iran
2009, Behrad Niazmand, • Ranked 1st for three semesters among the Computer engineering Department's Hardware students , IAU, South Tehran branch, Iran
 
 
Field of research
FIELD OF RESEARCH: 4. Natural Sciences and Engineering; 4.8. Electrical Engineering and Electronics; CERCS SPECIALITY: T171 Microelectronics ; SPECIALITY: Information and Communication Technology (Computer and Systems Engineering) , • System-on-Chip /Network-on-Chip Design o Addressing Thermal issues using Adaptive Routing Algorithms o Working on new Selection Functions o Distributing Traffic and Temperature using minimal/non-minimal Routing Algorithms o Extending current Selection Function proposals to Networks with higher dimensions (3D) o Reconfigurable and Fault-Tolerant Architectures o Introduction of checkers for Fault Detection in control part of NoC routers • Computer Architecture o Studying the Architecture of Multi-Core Processors • Hardware Modeling and Design • Computer Networks • Real-Time Embedded Systems o Mixed-Criticality Systems
 
 
Additional information
• Acceptance of the paper titled “A Framework for Comprehensive Automated Evaluation of Concurrent Online Checkers” to Euromicro DSD conference held in Madeira, Portugal, as a co-author.
• Acceptance of the paper titled “Automated Minimization of Concurrent Online Checkers for Networks-on-Chip” 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2015) held in Bremen, Germany as a co-author.
• Acceptance of the paper “A framework for combining concurrent checking and on-line embedded test for low-latency fault detection in NoC routers” in 9th IEEE/ACM International Symposium on Networks-on-Chip (NOCS 2015) held in Vancouver, Canada, as a co-author.
• Acceptance of the paper “Mixed-Criticality MPSoC Partitioning based on the NoCDepend Dependability Technique” in 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2015) held in Bremen, Germany, as a co-author.
• “Extended Checkers for Control Part of Routers in Network-on-Chips”, MEDIAN 2015, Manufacturable and Dependable Multicore Architectures at Nanoscale, DATE Friday Workshop, March 13, 2015, Grenoble, France
• “Extended Checkers for Control Part of Routers in Network-on-Chips”, Info- ja kommunikatsioonitehnoloogia doktorikool (IKTDK) 2014 conference for Doctoral Students in ICT, December 5-6, Rakvere, Estonia.
• "Extended Checkers for Logic-Based Distributed Routing in Network-on-Chips”, 14th Biennial Baltic Electronics Conference (BEC), October 6-8, 2014, Laulasmaa, Estonia.
• Seminar in department of Computer Engineering at Tallinn University of Technology, for practicing for BEC conference
• "Initialization and Installation of DHCP Service in windows Server 2003" Delivered as a term paper for the Computer Networks Lab. at Computer Engineering Department of IAU, 2009.
• "N-way Set-Associative Cache", Delivered as a term paper for Computer architecture Course, Under the supervision of
Dr. A. Broumandnia, at Computer Engineering Department of IAU, 2008.
• "Error Detection and Correction" Delivered as a term paper for Signals and Systems course, Under the supervision of
Dr. A. Broumandnia, at Computer Engineering Department of IAU, 2008.
• “Clock with AVR Microcontroller" Delivered as a course project for Microprocessor II course, under the supervision of
Dr. M. Kazemi Parsa, at Computer Engineering Department of IAU, 2009.

Publications

Category
Year
Publication
 
3.5.
2019
2.3.
2018
3.1.
2018
3.1.
2018
3.1.
2018
3.1.
2018
3.1.
2018
3.1.
2018
3.1.
2018
3.1.
2018
3.1.
2017
3.1.
2017
3.1.
2017
3.1.
2017
3.4.
2017
3.1.
2016
3.1.
2016
3.4.
2016
3.1.
2015
3.1.
2015
3.1.
2015
3.1.
2015
3.2.
2015
3.4.
2015
3.1.
2014
3.1.
2014
3.1.
2012
26.04.2019
  • Leitud 3 kirjet
ProgrammLiikNumberNimiProjekti algusProjekti lõppVastutav täitjaAsutusFinantseerijapoolne rahastamine
MUUVFP15002EL Horizon 2020 uurimisprojekt IMMORTAL01.03.201528.02.2018Jaan RaikTallinna Tehnikaülikool; Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut, Arvutisüsteemide diagnostika ja verifitseerimise õppetool 377 750,00 EUR
TKAlamprojektTAR16013 (EXCITE) (TK148)IT Tippkeskus EXCITE01.09.201601.03.2023Maarja KruusmaaTallinna Tehnikaülikool, Infotehnoloogia teaduskond, Biorobootika keskus; Cybernetica AS2 642 075,15 EUR
IUTIUT19-1Usaldusväärsed mitmetuumalised arvutisüsteemid01.01.201431.12.2019Jaan RaikTallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut; Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutisüsteemide instituut1 572 000,00 EUR