See veebileht kasutab küpsiseid kasutaja sessiooni andmete hoidmiseks. Veebilehe kasutamisega nõustute ETISe kasutustingimustega. Loe rohkem
Olen nõus

Dmitri Mihhailov

https://www.etis.ee/CV/Dmitri_Mihhailov_001/est
dmitri.mihhailov@ttu.ee

Teenistuskäik

Töökohad ja ametid
01.01.2017–31.08.2019   
Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutisüsteemide instituut, Teadur (0,25)
01.09.2015–31.12.2016   
Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut, Arvutisüsteemide projekteerimise õppetool , Teadur (0,25)
01.09.2012–30.06.2015   
Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut, Arvutisüsteemide projekteerimise õppetool , Teadur (1,00)
01.09.2010–31.08.2012   
Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut, Arvutisüsteemide projekteerimise õppetool , Teadur (0,50)
2007–2010   
Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut, Arvutisüsteemide projekteerimise õppetool , erakorraline assistent (0,25)
 
 
Haridustee
2007–2012   
Tallinna Tehnikaülikool (doktoriõpe, info- ja kommunikatsioonitehnoloogia)
2005–2007   
Tallinna Tehnikaülikool (tehnikateaduse magistri kraad; arvuti- ja süsteemitehnika õppekava)
2000–2005   
Tallinna Tehnikaülikool (tehnikateaduste bakalaureuse kraad; arvuti- ja süsteemitehnika õppekava)

Kvalifikatsioon

Teaduskraadid
Dmitri Mihhailov, doktorikraad, 2012, (juh) Aleksander Sudnitsõn; Valeri Sklyarov, Hardware Implementation of Recursive Sorting Algorithms Using Tree-like Structures and HFSM Models (Rekursiivsete sortimisalgoritmide riistvaraline realiseerimine kasutades puulaadseid struktuure ja HFSM mudeleid), Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut, Arvutisüsteemide projekteerimise õppetool.
Dmitri Mihhailov, magistrikraad, 2007, (juh) Aleksander Sudnitsõn, Rapid Prototyping of Digital Systems with UP3 Platform (Digitaalsüsteemide Kiir Prototüüpimine UP3 Platformi Abil), Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut, Arvutisüsteemide projekteerimise õppetool.
 
 
Teadustöö põhisuunad
ETIS KLASSIFIKAATOR: 4. Loodusteadused ja tehnika; 4.6. Arvutiteadused; CERCS KLASSIFIKAATOR: T120 Süsteemitehnoloogia, arvutitehnoloogia; TÄPSUSTUS: energiatarbe prognoosimis- ja hindamismeetodid, energiatarvet minimeeriv projekteerimine, digitaalsüsteemide projekteerimine FPGA platformidel, energiatarbe prognoosimis- ja hindamismeetodid, energiatarvet minimeeriv projekteerimine, digitaalsüsteemide projekteerimine FPGA platformidel

Lõppenud projektid

Publikatsioonid

Klass
Aasta
Publikatsioon
 
3.1.
2013
Mihhailov, D.; Rjabov, A.; Sklyarov, V.; Skliarova, I.; Sudnitson, A. (2013). Optimization of Address-based Data Sorting Unit with External Memory Support. International Conference on Computer Systems and Technologies (CompSysTech 2013): International Conference on Computer Systems and Technologies (CompSysTech 2013), Ruse Bulgaria, June 28-29, 2013. ACM, 83−90. (ACM International Conference Proceeding Series ; 767).
3.1.
2013
Sklyarov, V.; Skliarova, I.; Kruus, M.; Mihhailov, D.; Sudnitson, A. (2013). Address-based Data Processing over N-ary Trees. IEEE EUROCON 2013, Zagreb, Croatia, July 1-4, 2013. IEEE, 1790−1797.
3.1.
2012
Sklyarov, V.; Skliarova, I.; Mihhailov, D.; Sudnitson, A. (2012). Performance Evaluation for FPGA-based Processing of Tree-Like Structures. 19 th IEEE International Conference on Electronics, Circuits, and Systems (IEEE ICECS), Seville, Spain, Dec. 9-12, 2012. IEEE, 217−220.
3.1.
2012
Mihhailov, D.; Sudnitson, A.; Sklyarov, V.; Skliarova, I. (2012). Implementation of Address-Based Data Sorting on Different FPGA Platforms. Proc. of 10th East-West Design & Test Symposium (EWDTS’2012), Kharkov, Ukraine, September 14-17, 2012. IEEE, 38−41.
3.1.
2012
Mihhailov, D.; Sklyarov, V.; Skliarova, I.; Sudnitson, A. (2012). Implementation of Sorting Algorithms in Reconfigurable Hardware. The 2012 IEEE Mediterranean Electrotechnical Conference (MELECON 2012), Hammamet, Tunisia, March 25-28, 2012. IEEE, 107−110.
1.1.
2011
Mihhailov, D.; Sklyarov, V.; Skliarova, I.; Sudnitson, A. (2011). Acceleration of Recursive Data Sorting over Tree-based Structures. Electronics and Electrical Engineering, 51−56.
2.3.
2011
Mihhailov, D. (2011). Hardware Implementation of Recursive Sorting Algorithms Using Tree-like Structures and HFSM Models. (Tallinna Tehnikaülikool). Tallinn: TTU Press.
3.1.
2011
Sklyarov, V.; Skliarova, I.; Mihhailov, D.; Sudnitson, A. (2011). Processing N-ary Trees in Hardware Circuits. 2011 International Symposium on Integrated Circuits (ISIC 2011), Singapore, Dec. 12-14. IEEE, 272−275.
3.1.
2011
Sklyarov, V.; Skliarova, I.; Mihhailov, D.; Sudnitson, A. (2011). Implementation in FPGA of Address-based Data Sorting. The 21st International Conference on Field Programmable Logic and Applications (FPL 2011), Chania, Crete, Greece, Sep. 5-7, 2011. IEEE Computer Society, 405−410.
3.1.
2011
Mihhailov, D.; Kruus, M.; Sklyarov, V.; Skliarova, I.; Sudnitson, A. (2011). Recursion and Hierarchy in Digital Design and Prototyping: A Case Study. International Conference on Computer Systems and Technologies (CompSysTech’2011),Vienna, Austria, 16-17 June 2011. NY, USA: ACM, 45−50. ( ACM International Conference Proceeding Series; 578).
3.1.
2011
Sklyarov, V.; Skliarova, I.; Mihhailov, D.; Sudnitson, A. (2011). High-performance Hardware Accelerators for Sorting and Managing Priorities. IEEE Symposium of Design and Diagnostics of Electronic Circuits and Systems ( DDECS 2011), Cottbus, Germany, April 13-15, 2011. IEEE, 313−318.
3.1.
2011
Sklyarov, V.; Skliarova, I.; Oliveira, R.; Mihhailov, D.; Sudnitson, A. (2011). Processing Tree-like Data Structures in Different Computing Platforms. 2011 International Conference on Information and Computer Applications (ICICA 2011), Dubai, United Arab Emirates, March. 18-20, 2011. IEEE, 112−116.
3.1.
2011
Sklyarov, V.; Skliarova, I.; Mihhailov, D.; Sudnitson, A. (2011). Processing Tree-like Data Structures for Sorting and Managing Priorities. Proc. the 2011 IEEE Symposium on Computer and Informatics: The 2011 IEEE Symposium on Computer and Informatics (ISCI 2011). Kuala Lumpur, Malaysia: IEEE, 322−327.
3.1.
2011
Sklyarov, V.; Skliarova, I.; Mihhailov, D.; Sudnitson, A. (2011). Multilevel Models for Data Processing. Proc. the 2011 IEEE GCC Conference and Exhibition (2011 IEEE GCC): The 2011 IEEE GCC Conference and Exhibition (2011 IEEE GCC), Dubai, United Arab Emirates, Feb. 19-22, 2011. IEEE, 136−139.
3.1.
2011
Mihhailov, D.; Sklyarov, V.; Skliarova, I.; Sudnitson, A. (2011). Optimization of Recursive Sorting Algorithms for Implementation in Hardware. ICM'10: 2010 International Conference on Microelectronics: 22nd International Conference on Microelectronics (ICM 2010), Cairo, Egypt, Dec. 19-22, 2010. IEEE Electron Devices Society, 471−474.10.1109/ICM.2010.5696191.
3.1.
2011
Mihhailov, D.; Sklyarov, V.; Skliarova, J.; Sudnitson, A. (2011). Application-specific hardware accelerator for implementing recursive sorting algorithms. The 2010 International Conference on Field-Programmable Technology (FPT'10), Beijing, China, Dec. 8-10, 2010. IEEE, 269−272.10.1109/FPT.2010.5681486.
3.1.
2011
Jenihhin, Maksim; Gorev, Maksim; Pesonen, Vadim; Mihhailov, Dmitri; Ellervee, Peeter; Hinrikus, Hiie; Bachmann, Maie; Lass, Jaanus. (2011). EEG Analyzer Prototype Based on FPGA. Poceedings of IEEE 7th International Symposium on Image and Signal Processing and Analysis (ISPA): IEEE 7th International Symposium on Image and Signal Processing and Analysis (ISPA 2011), Dubrovnik, Croatia, September 4-6, 2011. IEEE, 101−106.
3.1.
2011
Mihhailov, D.; Sklyarov, V.; Skliarova, I.; Sudnitson, A. (2011). Hardware Implementation of Recursive Sorting Algorithms. The 2011 International Conference on Electronic Devices, Systems & Applications (ICEDSA 2011), IEEE, Kuala Lumpur, Malaysia, April 25-27, 2011. IEEE, 33−38.
3.4.
2011
Gorev, M.; Pesonen, V.; Mihhailov, D.; Jenihhin, M.; Ellervee, P. (2011). FPGA-Based Implementation of EEG Analyzer. DATE'11 Friday Workshop on "Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing", Grenoble, France, March 2011. 1.
1.1.
2010
Sudnitson, Alexander; Mihhailov, Dmitri; Kruus, Margus (2010). Project-Oriented Approach to Low-Power Topics in Advanced Digital Design Course. Electronics and Electrical Engineering, 151−154.
3.1.
2010
Mihhailov, D.; Sudnitson, A.; Tarletski, K. (2010). Web-Based Tool for FSM Encoding Targeting Low-Power FPGA Implementation. The 27th International Conference on Microelectronics– MIEL-2010. Nis, Serbia, May 16-19, 2010. IEEE, 349−352.
3.1.
2010
Mihhailov, D.; Sklyarov, V.; Skliarova, I.; Sudnitson, A. (2010). Parallel FPGA-based Implementation of Recursive Sorting Algorithms. The 2010 International Conference on Reconfigurable Computing and FPGAs (ReConFig 2010), Cancun, Mexico, Dec. 13-15, 2010. IEEE Computer Society Press, 121−126.10.1109/ReConFig.2010.30.
3.1.
2010
Mihhailov, D.; Sklyarov, V.; Skliarova, I.; Sudnitson, A. (2010). Synthesis and Implementation of Hierarchical Finite State Machines with Implicit Modules. Proceedings : 2010 International Conference on Reconfigurable Computing and FPGAs : Cancun, Mexico, 13–15 December 2010. Ed. Viktor Prasanna, Juergen Becker, and René Cumplido. IEEE Computer Society Press, 436−441.10.1109/ReConFig.2010.29.
3.1.
2010
Mihhailov, D.; Sklyarov, V.; Skliarova, J.; Sudnitson, A. (2010). Optimization of FPGA-based Circuits for Recursive Data Sorting. BEC 2010 : 12th biennial Baltic Electronics Conference : proceedings of the 12th biennial Baltic Electronics Conference : Tallinn University of Technology, October 4-6, 2010, Tallinn, Estonia. Tallinn: IEEE, 129−132.
3.1.
2010
Mihhailov, Dmitri; Sklyarov, Valery; Skliarova, Iouliia; Sudnitson, Alexander (2010). Hardware Implementation of Recursive Algorithms. 53rd IEEE International Midwest Symposium on Circuits and Systems - IEEE MWSCAS 2010, Seattle, WA, USA, August 1-4, 2010. IEEE, 225−228.
3.1.
2009
Sudnitson, Alexander; Mihhailov, Dmitri; Kruus, Margus (2009). Cooperation of FPGA-Based Educational Boards and Web-Based Point Design Tools for Research and Education. IFIP EduTech’09International Workshop, Florianopolis- Brazil, Oct.15-16.
3.1.
2009
Sudnitson, A.; Mihhailov, D.; Kruus, M.; Tarletski, K. (2009). FSM Decomposition with Application to FPGA Synthesis. Proceedings of the International Conference on Computer Systems and Technologies and Workshop for PhD Students in Computing: International Conference on Computer Systems and Technologies-CompSysTech’09, Ruse, Bulgaria. Ed. B. Rachev, A. Smrikarov. ACM, IV.4.1−IV.4.6. (ACM International Conference Proceeding Series; 433).
3.1.
2009
Sudnitson, Alexander; Mihhailov, Dimitri; Kruus, Margus (2009). Advanced Topics of FSM Design Using FPGA Educational Boards and Web-Based Tools. IEEE East-West Design & Test Symposium, Moscow, Russia. 446−449.
3.1.
2008
Mihhailov, D.; Kruus, M.; Sudnitson, A. (2008). FPGA Platform Based Digital Design Education. Proceedings of the 9th International Conference on Computer Systems and Technologies and Workshop for PhD Students in Computing: International Conference on Computer Systems and Technologies (CompSysTech’2008), Gabrovo, Bulgaaria. Ed. B. Rachev, A. Smrikarov. ACM, IV.1−IV.6. (ACM International Conference Proceeding Series; 374).
30.04.2020

Dmitri Mihhailov

https://www.etis.ee/CV/Dmitri_Mihhailov_001/eng
dmitri.mihhailov@ttu.ee

Career

Institutions and positions
01.01.2017–31.08.2019   
Tallinn University of Technology , School of Information Technologies, Department of Computer Systems, Researcher (0,25)
01.09.2015–31.12.2016   
Tallinn University of Technology , School of Information Technologies, Department of Computer Engineering , Chair of Computer Systems Design, Researcher (0,25)
01.09.2012–30.06.2015   
Tallinn University of Technology , School of Information Technologies, Department of Computer Engineering , Chair of Computer Systems Design, Researcher (1,00)
01.09.2010–31.08.2012   
Tallinn University of Technology , School of Information Technologies, Department of Computer Engineering , Chair of Computer Systems Design, Researcher (0,50)
2007–2010   
Tallinn University of Technology , School of Information Technologies, Department of Computer Engineering , Chair of Computer Systems Design, Assistant (0,25)
 
 
Education
2007–2012   
Tallinn University of Technology (Doctor Degree; Information and Communication Technology)
2005–2007   
Tallinn University of Technology (Master Degree; Computer and Systems Engineering)
2000–2005   
Tallinn University of Technology (Bachelor Degree; Computer and Systems Engineering)

Qualifications

Academic degrees
Dmitri Mihhailov, Doctor's Degree, 2012, (sup) Aleksander Sudnitsõn; Valeri Sklyarov, Hardware Implementation of Recursive Sorting Algorithms Using Tree-like Structures and HFSM Models, Tallinn University of Technology School of Information Technologies, Department of Computer Engineering Chair of Computer Systems Design.
Dmitri Mihhailov, Master's Degree, 2007, (sup) Aleksander Sudnitsõn, Rapid Prototyping of Digital Systems with UP3 Platform, Tallinn University of Technology School of Information Technologies, Department of Computer Engineering Chair of Computer Systems Design.
 
 
Fields of research
ETIS CLASSIFICATION: 4. Natural Sciences and Engineering; 4.6. Computer Sciences; CERCS CLASSIFICATION: T120 Systems engineering, computer technology ; SPECIFICATION: power consumption estimation and optimization, digital system design on FPGA devices, power consumption estimation and optimization, digital system design on FPGA devices
 
 

Completed projects

Publications

Category
Year
Publication
 
3.1.
2013
Mihhailov, D.; Rjabov, A.; Sklyarov, V.; Skliarova, I.; Sudnitson, A. (2013). Optimization of Address-based Data Sorting Unit with External Memory Support. International Conference on Computer Systems and Technologies (CompSysTech 2013): International Conference on Computer Systems and Technologies (CompSysTech 2013), Ruse Bulgaria, June 28-29, 2013. ACM, 83−90. (ACM International Conference Proceeding Series ; 767).
3.1.
2013
Sklyarov, V.; Skliarova, I.; Kruus, M.; Mihhailov, D.; Sudnitson, A. (2013). Address-based Data Processing over N-ary Trees. IEEE EUROCON 2013, Zagreb, Croatia, July 1-4, 2013. IEEE, 1790−1797.
3.1.
2012
Sklyarov, V.; Skliarova, I.; Mihhailov, D.; Sudnitson, A. (2012). Performance Evaluation for FPGA-based Processing of Tree-Like Structures. 19 th IEEE International Conference on Electronics, Circuits, and Systems (IEEE ICECS), Seville, Spain, Dec. 9-12, 2012. IEEE, 217−220.
3.1.
2012
Mihhailov, D.; Sudnitson, A.; Sklyarov, V.; Skliarova, I. (2012). Implementation of Address-Based Data Sorting on Different FPGA Platforms. Proc. of 10th East-West Design & Test Symposium (EWDTS’2012), Kharkov, Ukraine, September 14-17, 2012. IEEE, 38−41.
3.1.
2012
Mihhailov, D.; Sklyarov, V.; Skliarova, I.; Sudnitson, A. (2012). Implementation of Sorting Algorithms in Reconfigurable Hardware. The 2012 IEEE Mediterranean Electrotechnical Conference (MELECON 2012), Hammamet, Tunisia, March 25-28, 2012. IEEE, 107−110.
1.1.
2011
Mihhailov, D.; Sklyarov, V.; Skliarova, I.; Sudnitson, A. (2011). Acceleration of Recursive Data Sorting over Tree-based Structures. Electronics and Electrical Engineering, 51−56.
2.3.
2011
Mihhailov, D. (2011). Hardware Implementation of Recursive Sorting Algorithms Using Tree-like Structures and HFSM Models. (Tallinna Tehnikaülikool). Tallinn: TTU Press.
3.1.
2011
Sklyarov, V.; Skliarova, I.; Mihhailov, D.; Sudnitson, A. (2011). Processing N-ary Trees in Hardware Circuits. 2011 International Symposium on Integrated Circuits (ISIC 2011), Singapore, Dec. 12-14. IEEE, 272−275.
3.1.
2011
Sklyarov, V.; Skliarova, I.; Mihhailov, D.; Sudnitson, A. (2011). Implementation in FPGA of Address-based Data Sorting. The 21st International Conference on Field Programmable Logic and Applications (FPL 2011), Chania, Crete, Greece, Sep. 5-7, 2011. IEEE Computer Society, 405−410.
3.1.
2011
Mihhailov, D.; Kruus, M.; Sklyarov, V.; Skliarova, I.; Sudnitson, A. (2011). Recursion and Hierarchy in Digital Design and Prototyping: A Case Study. International Conference on Computer Systems and Technologies (CompSysTech’2011),Vienna, Austria, 16-17 June 2011. NY, USA: ACM, 45−50. ( ACM International Conference Proceeding Series; 578).
3.1.
2011
Sklyarov, V.; Skliarova, I.; Mihhailov, D.; Sudnitson, A. (2011). High-performance Hardware Accelerators for Sorting and Managing Priorities. IEEE Symposium of Design and Diagnostics of Electronic Circuits and Systems ( DDECS 2011), Cottbus, Germany, April 13-15, 2011. IEEE, 313−318.
3.1.
2011
Sklyarov, V.; Skliarova, I.; Oliveira, R.; Mihhailov, D.; Sudnitson, A. (2011). Processing Tree-like Data Structures in Different Computing Platforms. 2011 International Conference on Information and Computer Applications (ICICA 2011), Dubai, United Arab Emirates, March. 18-20, 2011. IEEE, 112−116.
3.1.
2011
Sklyarov, V.; Skliarova, I.; Mihhailov, D.; Sudnitson, A. (2011). Processing Tree-like Data Structures for Sorting and Managing Priorities. Proc. the 2011 IEEE Symposium on Computer and Informatics: The 2011 IEEE Symposium on Computer and Informatics (ISCI 2011). Kuala Lumpur, Malaysia: IEEE, 322−327.
3.1.
2011
Sklyarov, V.; Skliarova, I.; Mihhailov, D.; Sudnitson, A. (2011). Multilevel Models for Data Processing. Proc. the 2011 IEEE GCC Conference and Exhibition (2011 IEEE GCC): The 2011 IEEE GCC Conference and Exhibition (2011 IEEE GCC), Dubai, United Arab Emirates, Feb. 19-22, 2011. IEEE, 136−139.
3.1.
2011
Mihhailov, D.; Sklyarov, V.; Skliarova, I.; Sudnitson, A. (2011). Optimization of Recursive Sorting Algorithms for Implementation in Hardware. ICM'10: 2010 International Conference on Microelectronics: 22nd International Conference on Microelectronics (ICM 2010), Cairo, Egypt, Dec. 19-22, 2010. IEEE Electron Devices Society, 471−474.10.1109/ICM.2010.5696191.
3.1.
2011
Mihhailov, D.; Sklyarov, V.; Skliarova, J.; Sudnitson, A. (2011). Application-specific hardware accelerator for implementing recursive sorting algorithms. The 2010 International Conference on Field-Programmable Technology (FPT'10), Beijing, China, Dec. 8-10, 2010. IEEE, 269−272.10.1109/FPT.2010.5681486.
3.1.
2011
Jenihhin, Maksim; Gorev, Maksim; Pesonen, Vadim; Mihhailov, Dmitri; Ellervee, Peeter; Hinrikus, Hiie; Bachmann, Maie; Lass, Jaanus. (2011). EEG Analyzer Prototype Based on FPGA. Poceedings of IEEE 7th International Symposium on Image and Signal Processing and Analysis (ISPA): IEEE 7th International Symposium on Image and Signal Processing and Analysis (ISPA 2011), Dubrovnik, Croatia, September 4-6, 2011. IEEE, 101−106.
3.1.
2011
Mihhailov, D.; Sklyarov, V.; Skliarova, I.; Sudnitson, A. (2011). Hardware Implementation of Recursive Sorting Algorithms. The 2011 International Conference on Electronic Devices, Systems & Applications (ICEDSA 2011), IEEE, Kuala Lumpur, Malaysia, April 25-27, 2011. IEEE, 33−38.
3.4.
2011
Gorev, M.; Pesonen, V.; Mihhailov, D.; Jenihhin, M.; Ellervee, P. (2011). FPGA-Based Implementation of EEG Analyzer. DATE'11 Friday Workshop on "Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing", Grenoble, France, March 2011. 1.
1.1.
2010
Sudnitson, Alexander; Mihhailov, Dmitri; Kruus, Margus (2010). Project-Oriented Approach to Low-Power Topics in Advanced Digital Design Course. Electronics and Electrical Engineering, 151−154.
3.1.
2010
Mihhailov, D.; Sudnitson, A.; Tarletski, K. (2010). Web-Based Tool for FSM Encoding Targeting Low-Power FPGA Implementation. The 27th International Conference on Microelectronics– MIEL-2010. Nis, Serbia, May 16-19, 2010. IEEE, 349−352.
3.1.
2010
Mihhailov, D.; Sklyarov, V.; Skliarova, I.; Sudnitson, A. (2010). Parallel FPGA-based Implementation of Recursive Sorting Algorithms. The 2010 International Conference on Reconfigurable Computing and FPGAs (ReConFig 2010), Cancun, Mexico, Dec. 13-15, 2010. IEEE Computer Society Press, 121−126.10.1109/ReConFig.2010.30.
3.1.
2010
Mihhailov, D.; Sklyarov, V.; Skliarova, I.; Sudnitson, A. (2010). Synthesis and Implementation of Hierarchical Finite State Machines with Implicit Modules. Proceedings : 2010 International Conference on Reconfigurable Computing and FPGAs : Cancun, Mexico, 13–15 December 2010. Ed. Viktor Prasanna, Juergen Becker, and René Cumplido. IEEE Computer Society Press, 436−441.10.1109/ReConFig.2010.29.
3.1.
2010
Mihhailov, D.; Sklyarov, V.; Skliarova, J.; Sudnitson, A. (2010). Optimization of FPGA-based Circuits for Recursive Data Sorting. BEC 2010 : 12th biennial Baltic Electronics Conference : proceedings of the 12th biennial Baltic Electronics Conference : Tallinn University of Technology, October 4-6, 2010, Tallinn, Estonia. Tallinn: IEEE, 129−132.
3.1.
2010
Mihhailov, Dmitri; Sklyarov, Valery; Skliarova, Iouliia; Sudnitson, Alexander (2010). Hardware Implementation of Recursive Algorithms. 53rd IEEE International Midwest Symposium on Circuits and Systems - IEEE MWSCAS 2010, Seattle, WA, USA, August 1-4, 2010. IEEE, 225−228.
3.1.
2009
Sudnitson, Alexander; Mihhailov, Dmitri; Kruus, Margus (2009). Cooperation of FPGA-Based Educational Boards and Web-Based Point Design Tools for Research and Education. IFIP EduTech’09International Workshop, Florianopolis- Brazil, Oct.15-16.
3.1.
2009
Sudnitson, A.; Mihhailov, D.; Kruus, M.; Tarletski, K. (2009). FSM Decomposition with Application to FPGA Synthesis. Proceedings of the International Conference on Computer Systems and Technologies and Workshop for PhD Students in Computing: International Conference on Computer Systems and Technologies-CompSysTech’09, Ruse, Bulgaria. Ed. B. Rachev, A. Smrikarov. ACM, IV.4.1−IV.4.6. (ACM International Conference Proceeding Series; 433).
3.1.
2009
Sudnitson, Alexander; Mihhailov, Dimitri; Kruus, Margus (2009). Advanced Topics of FSM Design Using FPGA Educational Boards and Web-Based Tools. IEEE East-West Design & Test Symposium, Moscow, Russia. 446−449.
3.1.
2008
Mihhailov, D.; Kruus, M.; Sudnitson, A. (2008). FPGA Platform Based Digital Design Education. Proceedings of the 9th International Conference on Computer Systems and Technologies and Workshop for PhD Students in Computing: International Conference on Computer Systems and Technologies (CompSysTech’2008), Gabrovo, Bulgaaria. Ed. B. Rachev, A. Smrikarov. ACM, IV.1−IV.6. (ACM International Conference Proceeding Series; 374).
30.04.2020

Otsi projekti

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Asutus on projekti finantseerija   Asutus on projekti teostaja  
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Kõik   Tavaprojektid   Ülemprojektid   Alamprojektid  
Uus Frascati (2015)
Uus ja vana Frascati (otsing uue järgi väljastab ka seotud vanad)
Kõik
Käimasolevad
Lõppenud
Algus
Hajus
Täpne
Lihtotsing Tühjenda
  • Leitud 8 kirjet
ProgrammLiikNumberNimiProjekti algusProjekti lõppVastutav täitjaAsutusFinantseerijapoolne rahastamine
PRGPRG780CMS eksperimendi ettevalmistamine kõrge heledusega tööperioodil läbi triggeri uuenduste01.01.202031.12.2024Mario KadastikKeemilise ja Bioloogilise Füüsika Instituut514 250,00 EUR
1.2.2.1.11.E!5568COMBOARD - FPGA-Based Test Acceleration Methodology for Complex Electronic Boards01.04.201131.03.2013Artur JutmanTestonica Lab OÜ133 110,00 EUR (kogurahastus 553 966,00 EUR)
ETFETF9423Kiibisisesed instrumendid elektroonikasüsteemide testimiseks01.01.201231.12.2015Sergei DevadzeTallinna Tehnikaülikool, Infotehnoloogia teaduskond46 440,00 EUR
1.2.5.4000124897 (4000124897/18/NL/CBi)On-Chip Health Monitoring and Fault Management for SoC Health-Awareness in Space Missions01.08.201829.02.2020Artur JutmanTestonica Lab OÜ199 908,00 EUR (kogurahastus 199 908,00 EUR)
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ETFETF8478Riistvara funktsionaalne verifitseerimine ja silumine01.01.201031.12.2013Maksim JenihhinTallinna Tehnikaülikool, Infotehnoloogia teaduskond55 219,32 EUR
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