See veebileht kasutab küpsiseid kasutaja sessiooni andmete hoidmiseks. Veebilehe kasutamisega nõustute ETISe kasutustingimustega. Loe rohkem
Olen nõus

Mohsin Amin

https://www.etis.ee/CV/Mohsin_Amin/est
24.04.1982
55555604
amin@pld.ttu.ee

Teenistuskäik

Töökohad ja ametid
2011–16.10.2012   
Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut, Arvutisüsteemide diagnostika ja verifitseerimise õppetool , Teadur (1,00)
 
 
Haridustee
2007–2011   
Doktorikraad
2006–2007   
Magistrikraad

Kvalifikatsioon

Teaduskraadid
Mohsin Amin, doktorant, (juh) Dr Camille DIOU, Conception d'une architecture journalisée tolérante aux fautes pour un processeur à pile de données (Design methodology of a fault-tolerant journalized stack processor architecture), Université Paul Verlaine Metz, France.
 
 
Teaduspreemiad ja tunnustused
2006, Mohsin Amin, Qualified for fully funded Scholarship for Masters leading to PhD from HEC Pakistan
 
 
Teadustöö põhisuunad
ETIS KLASSIFIKAATOR: 4. Loodusteadused ja tehnika; 4.6. Arvutiteadused; CERCS KLASSIFIKAATOR: T120 Süsteemitehnoloogia, arvutitehnoloogia

Publikatsioonid

Klass
Aasta
Publikatsioon
 
3.1.
2012
Amin, M.;Tagel, M.; Jervan, G.; Hollstein, T. (2012). Design Methodology for Fault-tolerant heterogeneous MPSoC under Real-Time Constraints. 7th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (1−6).. IEEE.
3.2.
2012
Mohsin AMIN, Camille DIOU, Fabrice MONTEIRO (2012). Processeur Tolerant aux Fautes. Saarbrücken, Germany: VDM publishing house.
1.2.
2011
AMIN Mohsin, RAMAZANI Abbas, MONTEIRO Fabrice, DIOU Camille, DANDACHE Abbas (2011). A Self-Checking HW Journal for a Fault Tolerant Processor Architecture. International Journal of Reconfigurable Computing, 1−15.
3.2.
2010
AMIN Mohsin, DIOU Camille, MONTEIRO Fabrice, RAMAZANI Abbas, DANDACHE Abbas (2010). A Self-Checking HW Journal for a Fault Tolerant Processor Architecture. Reconfigurable Communication-centric SoCs (ReCoSoC 2010).
3.5.
2010
AMIN Mohsin, DIOU Camille, MONTEIRO Fabrice, RAMAZANI Abbas, DANDACHE Abbas (2010). Error Detecting and Correcting Journal for Dependable Processor Core. GDR System on Chip System in Package (GDR-SoC-SiP’10), Paris, France.
3.1.
2009
RAMAZANI Abbas, AMIN mohsin, MONTEIRO fabrice, DIOU Camille, DANDACHE Abbas (2009). A Fault Tolerant Journalized Stack Processor Architecture. 15th IEEE International On-line Testing Symposium (IOLTS 2009). IEEE,.
3.1.
2009
AMIN Mohsin, MONTEIRO Fabrice, DIOU Camille, RAMAZANI Abbas, DANDACHE Abbas (2009). A HW/SW Mixed Mechanism to Improve the Dependability of a Stack Processor. 16th IEEE International Conference on Electronics, Circuits, and Systems (ICECS’09), Hammamet, Tunisia. IEEE,.
3.2.
2009
AMIN Mohsin, RAMAZANI Abbas, MONTEIRO Fabrice, DIOU Camille, DANDACHE Abbas (2009). A Dependable Stack Processor Core for MPSoC Development. XXIV Conference on Design of Circuits and Integrated Systems (DCIS’09), Zaragoza, Spain.
3.4.
2009
AMIN Mohsin, DIOU camille, MONTEIRO Fabrice, RAMAZANI Abbas, DANDACHE Abbas (2009). Journalized Stack Processor for Reliable Embedded Systems. 1st International Conference on Aerospace Science and Engineering (ICASE’09), Islamabad, Pakistan.
3.5.
2009
Amin Mohsin, Diou Camille, Monteiro Fabrice, Ramazani Abbas (2009). Design Methodology of Reliable Stack Processor Core. GDR System on Chip - System in Package 2009 (GDR-SoC-SiP’09), Orsay-Paris, France.
8.05.2018

Mohsin Amin

https://www.etis.ee/CV/Mohsin_Amin/eng
24.04.1982
55555604
amin@pld.ttu.ee

Career

Institutions and positions
2011–16.10.2012   
Tallinn University of Technology , School of Information Technologies, Department of Computer Engineering , Chair of Computer Systems Test and Verification, Researcher (1,00)
 
 
Education
2007–2011   
PhD
2006–2007   
MSc

Qualifications

Academic degrees
Mohsin Amin, Phd student, (sup) Dr Camille DIOU, Conception d'une architecture journalisée tolérante aux fautes pour un processeur à pile de données (Design methodology of a fault-tolerant journalized stack processor architecture), University Paul Verlaine Metz, France.
 
 
Honours & awards
2006, Mohsin Amin, Qualified for fully funded Scholarship for Masters leading to PhD from HEC Pakistan
 
 
Fields of research
ETIS CLASSIFICATION: 4. Natural Sciences and Engineering; 4.6. Computer Sciences; CERCS CLASSIFICATION: T120 Systems engineering, computer technology

Publications

Category
Year
Publication
 
3.1.
2012
Amin, M.;Tagel, M.; Jervan, G.; Hollstein, T. (2012). Design Methodology for Fault-tolerant heterogeneous MPSoC under Real-Time Constraints. 7th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (1−6).. IEEE.
3.2.
2012
Mohsin AMIN, Camille DIOU, Fabrice MONTEIRO (2012). Processeur Tolerant aux Fautes. Saarbrücken, Germany: VDM publishing house.
1.2.
2011
AMIN Mohsin, RAMAZANI Abbas, MONTEIRO Fabrice, DIOU Camille, DANDACHE Abbas (2011). A Self-Checking HW Journal for a Fault Tolerant Processor Architecture. International Journal of Reconfigurable Computing, 1−15.
3.2.
2010
AMIN Mohsin, DIOU Camille, MONTEIRO Fabrice, RAMAZANI Abbas, DANDACHE Abbas (2010). A Self-Checking HW Journal for a Fault Tolerant Processor Architecture. Reconfigurable Communication-centric SoCs (ReCoSoC 2010).
3.5.
2010
AMIN Mohsin, DIOU Camille, MONTEIRO Fabrice, RAMAZANI Abbas, DANDACHE Abbas (2010). Error Detecting and Correcting Journal for Dependable Processor Core. GDR System on Chip System in Package (GDR-SoC-SiP’10), Paris, France.
3.1.
2009
RAMAZANI Abbas, AMIN mohsin, MONTEIRO fabrice, DIOU Camille, DANDACHE Abbas (2009). A Fault Tolerant Journalized Stack Processor Architecture. 15th IEEE International On-line Testing Symposium (IOLTS 2009). IEEE,.
3.1.
2009
AMIN Mohsin, MONTEIRO Fabrice, DIOU Camille, RAMAZANI Abbas, DANDACHE Abbas (2009). A HW/SW Mixed Mechanism to Improve the Dependability of a Stack Processor. 16th IEEE International Conference on Electronics, Circuits, and Systems (ICECS’09), Hammamet, Tunisia. IEEE,.
3.2.
2009
AMIN Mohsin, RAMAZANI Abbas, MONTEIRO Fabrice, DIOU Camille, DANDACHE Abbas (2009). A Dependable Stack Processor Core for MPSoC Development. XXIV Conference on Design of Circuits and Integrated Systems (DCIS’09), Zaragoza, Spain.
3.4.
2009
AMIN Mohsin, DIOU camille, MONTEIRO Fabrice, RAMAZANI Abbas, DANDACHE Abbas (2009). Journalized Stack Processor for Reliable Embedded Systems. 1st International Conference on Aerospace Science and Engineering (ICASE’09), Islamabad, Pakistan.
3.5.
2009
Amin Mohsin, Diou Camille, Monteiro Fabrice, Ramazani Abbas (2009). Design Methodology of Reliable Stack Processor Core. GDR System on Chip - System in Package 2009 (GDR-SoC-SiP’09), Orsay-Paris, France.
8.05.2018

Otsi publikatsiooni

  • {{item.Name}}
 kuni 
Algus
Hajus
Täpne
Lihtotsing Tühjenda
  • Leitud 10 kirjet
PublikatsioonAutoridAastaVäljaande pealkiriKlassifikaatorFailAsutused
Design Methodology for Fault-tolerant heterogeneous MPSoC under Real-Time ConstraintsAmin, M.;Tagel, M.; Jervan, G.; Hollstein, T.20127th International Workshop on Reconfigurable Communication-centric Systems-on-Chip3.1.Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut;
Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut, Arvutisüsteemide projekteerimise õppetool
Processeur Tolerant aux FautesMohsin AMIN, Camille DIOU, Fabrice MONTEIRO20123.2.
A Self-Checking HW Journal for a Fault Tolerant Processor ArchitectureAMIN Mohsin, RAMAZANI Abbas, MONTEIRO Fabrice, DIOU Camille, DANDACHE Abbas2011International Journal of Reconfigurable Computing1.2.
A Self-Checking HW Journal for a Fault Tolerant Processor ArchitectureAMIN Mohsin, DIOU Camille, MONTEIRO Fabrice, RAMAZANI Abbas, DANDACHE Abbas20103.2.Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut, Arvutisüsteemide diagnostika ja verifitseerimise õppetool
Error Detecting and Correcting Journal for Dependable Processor CoreAMIN Mohsin, DIOU Camille, MONTEIRO Fabrice, RAMAZANI Abbas, DANDACHE Abbas20103.5.
A Fault Tolerant Journalized Stack Processor ArchitectureRAMAZANI Abbas, AMIN mohsin, MONTEIRO fabrice, DIOU Camille, DANDACHE Abbas20093.1.
A HW/SW Mixed Mechanism to Improve the Dependability of a Stack ProcessorAMIN Mohsin, MONTEIRO Fabrice, DIOU Camille, RAMAZANI Abbas, DANDACHE Abbas20093.1.
A Dependable Stack Processor Core for MPSoC DevelopmentAMIN Mohsin, RAMAZANI Abbas, MONTEIRO Fabrice, DIOU Camille, DANDACHE Abbas20093.2.
Journalized Stack Processor for Reliable Embedded SystemsAMIN Mohsin, DIOU camille, MONTEIRO Fabrice, RAMAZANI Abbas, DANDACHE Abbas20093.4.
Design Methodology of Reliable Stack Processor CoreAmin Mohsin, Diou Camille, Monteiro Fabrice, Ramazani Abbas20093.5.