Radomir Šebek

https://www.etis.ee/CV/Radomir_Šebek/est
16.06.1988
0037258206616
rasho.ieee@gmail.com

Teenistuskäik

Töökohad ja ametid
01.01.2012–...   
Skype Technologies OÜ, Software Development Engineer in Test (trainee)
01.09.2012–31.12.2013   
Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut, PhD candidate (1,00)
01.01.2011–31.12.2012   
Mindware OÜ, QA engineer (0.75)
 
 
Haridustee
2010–2012   
MSc degree, Software engineering, joint program, University of Tartu and Tallinn University of Technology
2007–2010   
BSc degree, University of Montenegro, Faculty of Electrical Engineering, study program of Electronics, Telecommunications and Computer Engineering

Kvalifikatsioon

Teaduskraadid
Radomir Šebek, magistrikraad, 2012, (juh) Thomas Hollstein; Gert Jervan, Memory consistency and cache coherency in networks on chip based multi-core systems, Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut.
Radomir Šebek, doktorant, (juh) Thomas Hollstein, Coherent Data Communication and Programming Models for scalable 3D Manycore Architectures, Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut.
5.04.2018

Radomir Šebek

https://www.etis.ee/CV/Radomir_Šebek/eng
16.06.1988
0037258206616
rasho.ieee@gmail.com

Career

Institution(s) and position(s)
01.01.2012–...   
Skype Technologies OÜ, Software Development Engineer in Test (trainee)
01.09.2012–31.12.2013   
Tallinn University of Technology , School of Information Technologies, Department of Computer Engineering , PhD candidate (1,00)
01.01.2011–31.12.2012   
Mindware OÜ, QA engineer (0.75)
 
 
Education
2010–2012   
MSc degree, Software engineering, joint program, University of Tartu and Tallinn University of Technology
2007–2010   
BSc degree, University of Montenegro, Faculty of Electrical Engineering, study program of Electronics, Telecommunications and Computer Engineering

Qualifications

Academic degrees
Radomir Šebek, Master's Degree, 2012, (sup) Thomas Hollstein; Gert Jervan, Memory consistency and cache coherency in networks on chip based multi-core systems, Tallinn University of Technology School of Information Technologies, Department of Computer Engineering.
Radomir Šebek, Phd student, (sup) Thomas Hollstein, Coherent Data Communication and Programming Models for scalable 3D Manycore Architectures, Tallinn University of Technology School of Information Technologies, Department of Computer Engineering.
5.04.2018
Detailne otsing
  • Leitud 1 kirjet
ProgrammLiikNumberNimiProjekti algusProjekti lõppVastutav täitjaAsutusFinantseerijapoolne rahastamine
SFSF0140041s08Töökindlate sardsüsteemide disain01.01.200831.12.2013Raimund UbarTallinna Tehnikaülikool, Infotehnoloogia teaduskond1 504 530,37 EUR