Valentin Tihhomirov

https://www.etis.ee/CV/Valentin_Tihhomirov/est
3.12.1978

Kvalifikatsioon

Teaduskraadid
Valentin Tihhomirov, magistrikraad, 2011, (juh) Peeter Ellervee, FPGA based fault emulation, Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut, Arvutisüsteemide diagnostika ja verifitseerimise õppetool.
Valentin Tihhomirov, magistrikraad, 2010, (juh) Peeter Ellervee; Jaan Raik, FPGA Based Fault Emulator for Sequential Circuits (FPGA põhine järjestik-skeemide rikete emulaator), Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut.
 
 

Jooksvad projektid

Lõppenud projektid

Publikatsioonid

Klass
Aasta
Publikatsioon
 
1.1.
2014
Jenihhin, Maksim; Tšepurov, Anton; Tihhomirov, Valentin; Hantson, Hanno; Raik, Jaan; Ubar, Raimund; Bartsch, Günter; Meza Escobar, Jorge Hernan; Wuttke, Heinz-Dietrich (2014). Automated Bug Localization in Processor Designs. IEEE Design & Test of Computers, 1, 83−92.10.1109/MDAT.2013.2271420.
3.1.
2014
Gaudesi, Marco; Jenihhin, Maksim; Raik, Jaan; Sanchez, Ernesto; Squillero, Giovanni; Tihomirov, Valentin; Ubar, Raimund (2014). Diagnostic Test Generation for Statistical Bug Localization using Evolutionary Computation. In: Lecture Notes in Computer Science (425−436).EvoHOT: Bio-Inspired Heuristics for Design Automation, Granada, Spain, 23-25 April, 2014. Springer-Verlag Berlin. (Applications of Evolutionary Computation Lecture Notes in Computer Science. ).10.1007/978-3-662-45523-4_35.
3.2.
2014
Jenihhin, Maksim; Tihhomirov, Valentin; Syed, Saif Abrar; Raik, Jaan; Bartsch, Günter (2014). zamiaCAD: Understand, Develop and Debug Hardware Designs. 1st Workshop on Design Automation for Understanding Hardware Designs (DuHDE), Friday Workshop at DATE 2014, Dresden, Germany, March 28, 2014. University of Bremen, Institute of Technology and Education, 1−6.
3.1.
2013
Tihhomirov, Valentin; Tšepurov, Anton; Jenihhin, Maksim; Raik, Jaan; Ubar, Raimund (2013). Assessment of Diagnostic Test for Automated Bug Localization. Proc. of 14th IEEE Latin-American Test Workshop: 14th IEEE Latin-American Test Workshop (LATW), Cordoba, Argentina, April 3-5, 2013. 1−6.10.1109/LATW.2013.6562665.
3.4.
2013
Tihhomirov, Valentin; Tšepurov, Anton; Syed, Saif Abrar; Jenihhin, Maksim; Raik, Jaan (2013). VHDL Design Debug Framework Based on zamiaCAD. DATE 2013 University Booth: Design Automation and Test in Europe, Grenoble, France, March 18-22, 2013. 1−1.
3.1.
2012
Tšepurov, Anton; Tihhomirov, Valentin; Jenihhin, Maksim; Raik, Jaan; Bartsch, Günter; Meza Escobar, Jorge Hernan; Wuttke, Heinz-Dietrich. (2012). Localization of Bugs in Processor Designs Using zamiaCAD Framework. 13th International Workshop on Microprocessor Test and Verification (MTV 2012) Common Challenges and Solutions, Austin, USA, December 10–12, 2012. IEEE, 1−6.
3.1.
2012
Tšepurov, Anton; Bartsch, Günter; Dorsch, Rainer; Jenihhin, Maksim; Raik, Jaan; Tihhomirov, Valentin (2012). A Scalable Model Based RTL Framework zamiaCAD for Static Analysis. 2012 IEEE/IFIP 20th International Conference on Very Large Scale Integration (VLSI-SoC), 7-10 October 2012, Santa Cruz, USA. IEEE, 171−176.10.1109/VLSI-SoC.2012.6379025.
3.1.
2012
Jenihhin, Maksim; Baranov, Samary; Raik, Jaan; Tihhomirov, Valentin (2012). PSL Assertion Checkers Synthesis with ASM Based HLS Tool ABELITE. In: 13th IEEE Latin-American Test Workshop Proceedings (131−136).. IEEE Computer Society Press.
3.4.
2012
Chepurov, Anton; Tihhomirov, Valentin; Syed, Saif Abrar; Jenihhin, Maksim; Raik, Jaan (2012). Applications of the Open Source HW Design Framework zamiaCAD. DATE 2012 University Booth: Design Automation and Test in Europe, Dresden, Germany, March 12-16, 2012. 1−1.
3.1.
2005
Raik, J.; Ellervee, P.;Tihhomirov, V.;Ubar, R. (2005). Improved Fault Emulation for Synchronous Sequential Circuits. The 8th Euromicro Conference on Digital System Design (DSD'2005), Porto, Portugal, Aug. 2005.. IEEE Computer Society Press, 72−78.
1.1.
2004
Ellervee, P.; Raik, J.; Tihhomirov, V.; Tammemae, K (2004). Evaluating fault emulation on FPGA. In: The International Conference on Field Programmable Logic and Applications (FPL'2004) (354−363).. Springer. (Lecture Notes in Computer Science; 3203).
3.1.
2004
Ellervee, P.; Raik, J.; Tihhomirov, V. (2004). Environment for Fault Simulation Acceleration on FPGA. The 9th Biennial Baltic Electronic Conference (BEC'2004), Tallinn, Estonia, Oct. 2004. 217−220.
3.1.
2004
Ellervee, Peeter; Raik, Jaan; Tihhomirov, Valentin (2004). Environment for fault simulation acceleration on FPGA. BEC 2004 : proceedings of the 9th Biennial Baltic Electronics Conference : October 3-6, 2004, Tallinn, Estonia, 217−220.
3.1.
2004
Ellervee, P.; Raik, J.; Tihhomirov, V.; Ubar, R. (2004). FPGA Based Fault Emulation of Synchronous Sequential Circuits. The 22nd NORCHIP Conference, Oslo, Norway, Nov. 2004. 59−62.
3.4.
2004
Raik, J.; Ellervee, P.; Tihhomirov, V.; Ubar, R. (2004). Fast Fault Emulation for Synchronous Sequential Circuits. East-West Design & Test Workshop (EWDTW'04), Yalta, Ukraine, pp.35-40, Sept. 2004.. 35−40.
3.4.
2003
Ellervee, P.; Raik, J.; Tihhomirov, V. (2003). Fault Emulation on FPGA: A Feasibility Study. The 21st NORCHIP Conference, Riga, Latvia, pp.92-95, 2003. 92−95.
18.04.2019

Valentin Tihhomirov

https://www.etis.ee/CV/Valentin_Tihhomirov/eng
3.12.1978

Qualifications

Academic degrees
Valentin Tihhomirov, Master's Degree, 2010, (sup) Peeter Ellervee; Jaan Raik, FPGA Based Fault Emulator for Sequential Circuits, Tallinn University of Technology School of Information Technologies, Department of Computer Engineering.
18.04.2019
Detailne otsing
  • Leitud 6 kirjet
ProgrammLiikNumberNimiProjekti algusProjekti lõppVastutav täitjaAsutusFinantseerijapoolne rahastamine
MUUELIKO 2.2Hajus- ja sardsüsteemide testimine, verifitseerimine ning diagnostika01.07.200930.06.2015Jüri VainELIKO Tehnoloogia Arenduskeskus OÜ1 826 248,00 EUR
ETFETF9429Isetestivad usaldatavad mesokroonsed kiipvõrgud01.01.201231.12.2015Jaan RaikTallinna Tehnikaülikool, Infotehnoloogia teaduskond33 984,00 EUR
TKAlamprojektTAR16013 (EXCITE) (TK148)IT Tippkeskus EXCITE01.09.201601.03.2023Maarja KruusmaaTallinna Tehnikaülikool, Infotehnoloogia teaduskond, Biorobootika keskus; Cybernetica AS2 642 075,15 EUR
ETFETF8478Riistvara funktsionaalne verifitseerimine ja silumine01.01.201031.12.2013Maksim JenihhinTallinna Tehnikaülikool, Infotehnoloogia teaduskond55 219,32 EUR
SFSF0140041s08Töökindlate sardsüsteemide disain01.01.200831.12.2013Raimund UbarTallinna Tehnikaülikool, Infotehnoloogia teaduskond1 504 530,37 EUR
IUTIUT19-1Usaldusväärsed mitmetuumalised arvutisüsteemid01.01.201431.12.2019Jaan RaikTallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut; Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutisüsteemide instituut1 572 000,00 EUR