8.05.1984
+37254637278
tara.ghasempouri@gmail.com

Teenistuskäik

Töökohad ja ametid
01.09.2019–...   
Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutisüsteemide instituut, tarkvarainsener (1,00)
01.06.2016–...   
MIOSElettronica, Verona, Itaalia, tarkvarainsener (1,00)
2018–24.12.2018   
Delft University of Technology, Collaborating with Prof.Said Hamdoui on verification and security methodologies (1,00)
01.05.2017–31.08.2019   
Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutisüsteemide instituut, Teadur (1,00)
01.06.2013–31.05.2016   
Verona Ülikool, Teadur (1,00)
 
 
Haridustee
01.05.2019–...   
Researcher
01.09.2018–24.12.2018   
Visiting Researcher
01.05.2017–01.05.2019   
Post-Doc
01.09.2013–31.08.2016   
Doktorantuur, Verona Ülikool
01.01.2008–01.09.2011   
Magistrantuur, Islamic Azad University, Department of Computer Science, Tehran Branch, Iraan
01.01.2002–01.09.2007   
Bakalaureuseõpe, Arvutitehnika, Shomal University, Amol, Iraan
 
 
Teadusorganisatsiooniline ja -administratiivne tegevus
2013−...   
IEEE liige
2019−2019   
Reviewer for the workshop in DATE Conference the research area: DUHDe
2019−2019   
Programme committee in DUHDe workshop
2018−2018   
Reviewer for the leading conferences in the research area: VLSI-SOC
2018−2018   
Special Talk in VLSI-SOC conference
2016−2016   
Reviewer for the leading conferences in the research area: MEMOCODE
2015−2015   
Reviewer for the leading conferences in the research area: ITC
2014−2014   
Reviewer for the leading conferences in the research area: DAC
2013−2013   
Retsensent oma valdkonna juhtivatel konverentsidel DATE and VLSI-SoC
 
 
Teenistuskäigu lisainfo
Keerukate süsteemide käitumise analüüs ja nende modelleerimine läbi ajaliste mustrite.
Verona Ülikool, Itaalia
Juuni 2013 - juuni 2016
;
Metoodikate väljatöötamine süsteemide käitumisest tuletatud mustrite kvaliteedi mõõtmiseks.
Verona Ülikool, Itaalia
Juuni 2013 - juuni 2016
;
Väitepõhise kontrolli meetodite rakendademine sardsüsteemide projekteerimisvoos.
Verona Ülikool, Itaalia
Juuni 2013 - juuni 2016

;
Ärisüsteemide modelleerimine FuzzyUML ja Petrinet abil.
Sari, Iraan
2009 - 2011;
Tarkvara projekteerimisvahendid modelleerimiseks ja keeruliste süsteemide käitumise analüüsiks C++, C, SystemC ja PSL keeltes.
Verona Ülikool, Itaalia
Juuni 2013 - juuni 2016
;
Süsteemianalüüs haiglate haldustarkvarale kasutades UML keelt.
Pooyajam ettevõte, Babol, Iraan
2011 - 2013;
Haridusasutustes kasutatava administratiivse tarkvara programmeerimine C# keeles.
Rayvarz ettevõte , Teheran, Iraan
2008 - 2011;

Kvalifikatsioon

 
 
Teaduspreemiad ja tunnustused
2011, Tara Ghasempouri, Parim magistriõppe tudeng, Azadi Ülikool, Tehran
 
 
Teadustöö põhisuunad
VALDKOND: 4. Loodusteadused ja tehnika; 4.6. Arvutiteadused; CERCS ERIALA: T120 Süsteemitehnoloogia, arvutitehnoloogia; PÕHISUUND: System Verification - Functional Safety -
VALDKOND: 4. Loodusteadused ja tehnika; 4.8. Elektrotehnika ja elektroonika; CERCS ERIALA: T171 Mikroelektroonika
 
 
Lisainfo
PhD forum, Improving assertion-based verification by automatic generation and abstraction of PSL assertions, Proceedings of "IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)", Daejeon, South Korea, 5-7 October 2015.
SyDe summer school on “Formal modeling and verification of cyber-physical systems”, Bremen, Germany, 9-11 September 2015.
AVoCS summer school on “Model based design and analysis of cyber-physical systems”, Enschede, The Netherlands, 17-23 September 2014.
Nano-Tera/Artist summer school on “Embedded system design”, Aix-Les-Bains, France, 13 – 18, September 2013.

Publikatsioonid

Klass
Aasta
Publikatsioon
 
3.1.
2018
3.1.
2018
3.1.
2018
3.1.
2018
3.1.
2018
3.1.
2016
1.1.
2015
3.1.
2015
3.1.
2015
3.1.
2014
3.4.
2012
3.1.
2011
19.09.2019
8.05.1984
+37254637278
tara.ghasempouri@gmail.com
Currently, I am a researcher in Tallinn University of Technology in Computer System Department. I started my collaboration with Computer Science department in 2017. The result of this collaboration was mainly publishing innovative methodologies and developing various tools on improving Assertion-based Verification in scientific article format. I have been a research visitor in University of Delft in 2018. This visit caused in developing a framework on functional verification and security requirement which can be a potential European Project proposal. I received a PhD degree in Computer Science from University of Verona. During my PhD program I have researched on verification of embedded system, Data mining and Fault analysis. Right after the PhD graduation I started working at MIOS Electeronica, whose main activities are verification and testing of railway manufactures. My main tasks in this company were related to defining test cases for verification of systems, such as door control and brake control system of trains.

Career

Institution(s) and position(s)
01.09.2019–...   
Tallinn University of Technology , School of Information Technologies, Department of Computer Systems, Software Engineer (1,00)
01.06.2016–...   
MIOSElettronica, Verona, Italy, Software engineer (1,00)
2018–24.12.2018   
Delft University of Technology, Visiting Researcher (1,00)
01.05.2017–31.08.2019   
Tallinn University of Technology , School of Information Technologies, Department of Computer Systems, Researcher (1,00)
01.06.2013–31.05.2016   
University of Verona, Researcher (1,00)
 
 
Education
01.05.2019–...   
Researcher in Tallinn University of Technology, Computer System Department
01.09.2018–24.12.2018   
Visiting Researcher
01.05.2017–01.05.2019   
Post Doctoral Researcher in Tallinn University of Technology, Computer System Department
01.09.2013–31.08.2016   
PhD studies, University of Verona
01.01.2008–01.09.2011   
MSc studies, Islamic Azad University, Department of Computer Science, Tehran Branch, Iran
01.01.2002–01.09.2007   
BSc., Computer Engineering, Shomal University, Department of Computer Science, Amol, Iran
 
 
R&D related managerial and administrative work
2013−...   
Member of IEEE
2019−2019   
Reviewer for the workshop in DATE Conference the research area: DUHDe
2019−2019   
Programme committee in DUHDe workshop
2018−2018   
Reviewer for the leading conferences in the research area: VLSI-SOC
2018−2018   
Special Talk in VLSI-SOC conference
2016−2016   
Reviewer for the leading conferences in the research area: MEMOCODE
2015−2015   
Reviewer for the leading conferences in the research area: ITC
2014−2014   
Reviewer for the leading conferences in the research area: DAC
2013−2013   
Reviewer for the leading conferences in the research area: DATE and VLSI-SoC
 
 
Additional career information
Analyzing behavior of complex system and modeling them through temporal patterns.
University of Verona, Italy
June 2013 - June 2016;
Implementing methodologies for quality measurement of extracted patterns from behaviors of systems.
University of Verona, Italy
June 2013 - June 2016;
Applying assertion based verification techniques on embedded system design flow.
University of Verona, Italy
June 2013 - June 2016
;
Modeling business systems with FuzzyUML and Petrinet.
Sari, Iran
2009 – 2011;
Software Engineering
Design tools for modeling and analyzing behaviors of complex systems with C++, C, SystemC and PSL.
University of Verona, Italy
June 2013 – June 2016 ;
Software Engineering
System analyzing for administrative software for hospitals using UML.
Pooyajam company, Babol, Iran
2011 - 2013;
Software Engineering
Programming adminstrative software for educational institutions using C#.
Rayvarz company, Tehran, Iran
2008 - 2011 ;

Qualifications

 
 
Honours & awards
2011, Tara Ghasempouri, Received the best student certification during the Master program in Azad University, Tehran
 
 
Field of research
FIELD OF RESEARCH: 4. Natural Sciences and Engineering; 4.6. Computer Sciences; CERCS SPECIALITY: T120 Systems engineering, computer technology
FIELD OF RESEARCH: 4. Natural Sciences and Engineering; 4.8. Electrical Engineering and Electronics; CERCS SPECIALITY: T171 Microelectronics
 
 
Additional information
PhD forum, Improving assertion-based verification by automatic generation and abstraction of PSL assertions, Proceedings of "IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)", Daejeon, South Korea, 5-7 October 2015.
SyDe summer school on “Formal modeling and verification of cyber-physical systems”, Bremen, Germany, 9-11 September 2015.
AVoCS summer school on “Model based design and analysis of cyber-physical systems”, Enschede, The Netherlands, 17-23 September 2014.
Nano-Tera/Artist summer school on “Embedded system design”, Aix-Les-Bains, France, 13 – 18, September 2013.

Publications

Category
Year
Publication
 
3.1.
2018
3.1.
2018
3.1.
2018
3.1.
2018
3.1.
2018
3.1.
2016
1.1.
2015
3.1.
2015
3.1.
2015
3.1.
2014
3.4.
2012
3.1.
2011
19.09.2019
  • Leitud 3 kirjet
ProgrammLiikNumberNimiProjekti algusProjekti lõppVastutav täitjaAsutusFinantseerijapoolne rahastamine
MUUVFP15055Horisont 2020 Twinning projekt TTÜ võimekuse tõstmiseks nanoelektroonikal põhinevate usaldusväärsete küberfüüsikaliste süsteemide valdkonnas (TUTORIAL)01.01.201631.12.2018Jaan RaikTallinna Tehnikaülikool; Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut, Arvutisüsteemide diagnostika ja verifitseerimise õppetool 518 000,00 EUR
IUTIUT19-1Usaldusväärsed mitmetuumalised arvutisüsteemid01.01.201431.12.2019Jaan RaikTallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut; Tallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutisüsteemide instituut1 572 000,00 EUR
MOBJDMOBJD73Verifitseerimise väidete kaevandamise ja kvaliteedi hindamise meetodid funktsionaalse ohutuse parandadamiseks arvutisüsteemides01.05.201730.04.2019Tara GhasempouriTallinna Tehnikaülikool, Infotehnoloogia teaduskond, Arvutitehnika instituut66 424,00 EUR