Hybrid BIST Optimization Using Reseeding and Test Set Compaction

Jervan, G.; Orasson, E.; Kruus, H.; Ubar, R. (2008). Hybrid BIST Optimization Using Reseeding and Test Set Compaction. Microprocessors and Microsystems: Embedded Hardware Design, 32, 254−262.
ajakirjaartikkel
Jervan, G.; Orasson, E.; Kruus, H.; Ubar, R.
  • Inglise
Microprocessors and Microsystems: Embedded Hardware Design
0141-9331
32
Dependability and Testing of Modern Digital Systems (Edited by Hana Kubátová)
2008
254262
Ilmunud
1.1. Teadusartiklid, mis on kajastatud Web of Science andmebaasides Science Citation Index Expanded, Social Sciences Citation Index, Arts & Humanities Citation Index ja/või andmebaasis Scopus (v.a. kogumikud)
WOS

Viited terviktekstile